Array-built-in-self-test (ABIST) for efficient, fast, bitmapping of large embedded arrays in manufacturing test
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United States of America Patent
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Nov 4, 2003
Grant Date -
N/A
app pub date -
Aug 1, 2000
filing date -
Aug 1, 2000
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A structure and method for an integrated circuit which includes read/write memory having a plurality of memory devices, each of the memory devices having a unique address; a built-in self-test (BIST) engine, the BIST engine having a controller responsive to a test enable signal and operative to generate and store test data in the read/write memory; a comparator operative to compare retrieved data read from the read/write memory and the test data during a first pass test, the comparator identifying failed cycles where the retrieved data does not correspond correctly to the test data; and a diagnostic unit operative to store the failed cycles and being responsive to the controller generating and storing the test data in the read/write memory and operative to store failed data and failing addresses during a first pass test, wherein the BIST engine stops only at each of the failed cycles during the first pass test.
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