Impedance emulator
Number of patents in Portfolio can not be more than 2000
United States of America Patent
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-
Nov 11, 2003
Issued Date -
N/A
app pub date -
Feb 22, 2002
filing date -
Aug 15, 2000
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A method and device to emulate impedances includes a pair of impedances connected in series between two circuit nodes, the impedances forming a voltage divider having at its midpoint a reference voltage V.sub.X. An OP AMP includes a positive input connected to the V.sub.X.sub..sub.-- node and the negative input connected to the output thereof in a direct feedback loop. The OP AMP output is also connected to a load impedance that is connected either one of the nodes. A transistor may be interposed between the load impedance and the circuit node. The OP AMP may be provided with a negative gain to emulate an inductor. The voltage divider may be variable to emulate a variable impedance.
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