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Abstract

A ternary content addressable memory device is disclosed which writes data into a data cell and writes mask data into a mask data cell in a ternary CAM cell unit by a single write cycle when the ternary content addressable memory device is used as a binary content addressable memory device. The content addressable memory device includes at least the ternary content addressable memory cell unit which stores ternary data representing three states of '0', '1', and 'don't care'. The ternary content addressable memory cell unit include the data cell for storing binary data of '0' and '1', and the mask cell for storing mask data for masking the binary data from a searching operation. The content addressable memory device includes a write circuit which writes the binary data into the data cell while writing the mask data in an unmask state into the mask cell at the same time, when the binary data is written into the ternary content addressable memory cell unit.

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First Claim