Apparatus and method for forming a battery in an integrated circuit

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United States of America Patent

PATENT NO 6650000
APP PUB NO 20020093029A1
SERIAL NO

09761123

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A method and structure that provides a battery within an integrated circuit for providing voltage to low-current electronic devices that exist within the integrated circuit. The method includes Front-End-Of-Line (FEOL) processing for generating a layer of electronic devices on a semiconductor wafer, followed by Back-End-Of-Line (BEOL) integration for wires connecting the electronic devices together to form completed electrical circuits of the integrated circuit. The BEOL integration includes forming a multilayered structure of wiring levels on the layer of electronic devices. Each wiring level includes conductive metallization (e.g., metal-plated vias, conductive wiring lines, etc.) embedded in insulative material. The battery is formed during BEOL integration within one or more wiring levels, and the conductive metallization conductively couples positive and negative terminals of the battery to the electronic devices. The battery may have several different topologies relative to the structural and geometrical relationships among the battery electrodes and electrolyte. Multiple batteries may be formed within one or more wiring levels, and may be conductively coupled to the electronic devices. The multiple batteries may be connected in series or in parallel.

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Patent Owner(s)

Patent OwnerAddress
GLOBALFOUNDRIES INCMAPLES CORPORATE SERVICES LIMITED PO BOX 309 UGLAND HOUSE GRAND CAYMAN KY1-1104

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ballantine, Arne W Round Lake, NY 100 1213
Groves, Robert A Highland, NY 58 1079
Lund, Jennifer L Amawalk, NY 14 397
Nakos, James S Essex, VT 57 879
Rice, Michael B Colchester, VT 8 128
Stamper, Anthony K Williston, VT 615 6820

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