Semiconductor memory device, and method for testing the same
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United States of America Patent
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Nov 18, 2003
Grant Date -
Jan 2, 2003
app pub date -
Apr 23, 2002
filing date -
Jun 29, 2001
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A semiconductor memory device and a method for testing the same which optimizes operation conditions by detecting a test cell that may easily fail in a test among the memory cells passing a burn-in test, and detecting the worst operation conditions by performing the test on the test cell. The device and method reduce power consumption in a refresh or active operation. According to the device and method set forth, a test unit tests a test cell, controls operation conditions of the semiconductor memory device according to the test result, and outputs the operation conditions. A driving unit drives the semiconductor memory device using the operation conditions controlled by the test unit.
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