Semiconductor memory device

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United States of America Patent

PATENT NO 6654314
SERIAL NO

10359190

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Abstract

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A method of accessing a semiconductor device that operates in synchronism with a clock signal, including fetching information indicating a memory cell location in a memory cell array in synchronism with the clock signal, determining first data of a plurality of data to be transferred sequentially, decoding the information indicating the memory cell location in the memory cell array and designating the memory cell, receiving data stored in the memory cell designated by the information indicating the memory cell location in the memory cell array in synchronism with the clock signal after a predetermined number of cycles of the clock signal, and outputting a plurality of data stored in the memory cells in synchronism with the clock signal and storing a plurality of input data in the memory cells in synchronism with the clock signal.

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Patent Owner(s)

Patent OwnerAddress
KABUSHIKI KAISHA TOSHIBATOKYO

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Saito, Shozo Yokohama, JP 37 682
Toda, Haruki Yokohama, JP 246 5348
Tokushige, Kaoru Yokohama, JP 37 1005

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