Gate circuit and semiconductor circuit to process low amplitude signals, memory, processor and information processing system manufactured by use of them

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United States of America Patent

PATENT NO 6657459
SERIAL NO

10143762

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Abstract

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A semiconductor integrated circuit device, responsive to an input signal having a low amplitude and short transition time, operates with low power consumption and prevents the flow of breakthrough current. In an example circuit thereof, the input signal is transmitted through an NMOS pass transistor to the gate of a first NMOS transistor and is applied, through a second NMOS transistor, to the gate of a first PMOS transistor, the first PMOS transistor performing complementary operation with the first NMOS transistor through the second NMOS transistor; the gate of the first PMOS transistor is connected to the power supply potential through the second PMOS transistor; the gate of the second NMOS transistor is connected to the power supply potential; and the gate of the second PMOS transistor is controlled by the signal at a common drain connection of the first NMOS and first PMOS transistors.

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Patent Owner(s)

Patent OwnerAddress
HITACHI LTD6-6 MARUNOUCHI 1-CHOME CHIYODA-KU TOKYO 1008280 ?1008280

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hara, Hideo Akigawa, JP 69 473
Hirose, Kosaku Higashimurayama, JP 4 50
Koike, Katsunori Hitachi, JP 11 71
Murabayashi, Fumio Urizura-machi, JP 46 500
Nemoto, Kayoko Hitachi, JP 5 93
Nishio, Yoji Hitachi, JP 98 2062
Yamada, Hiromichi Hadano, JP 127 1803
Yamauchi, Tatsumi Hitachioota, JP 74 1456

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