Cache-coherency protocol with recently read state for extending cache horizontally

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United States of America Patent

PATENT NO 6658536
SERIAL NO

08839547

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Abstract

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A method of extending a cache of a processing unit in a multi-processor computer system, by expanding the prior-art MESI cache-coherency protocol to include an additional cache-entry state corresponding to a most recently accessed state. A value is loaded from system memory into one or more caches of adjacent processing units, and when a requesting processing unit issues an inquiry onto the system bus to read the value, the value is sourced from the cache of the adjacent processing unit containing a copy of the value that was most recently accessed. Each cache has at least one cache line with a block for storing the value, and an indication is provided that a cache line having a block which contains an instruction or data is in a 'recently read' state. Each cache entry has three bits to indicate the current state of the cache entry (one of five possible states). Any caches containing a valid copy of the value, other than the cache which contains a copy of the value that was most recently accessed, are assigned a state indicating that they hold the valid copy in a shared state. This protocol allows instructions and data which are shared among several caches to be sourced directly (intervened) by the cache having the most recently accessed copy, without retrieval from system memory (RAM), significantly improving the processing speed of the computer system.

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Patent Owner(s)

Patent OwnerAddress
INTERNATIONAL BUSINESS MACHINES CORPORATIONNEW ORCHARD ROAD ARMONK NY 10504

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Arimilli, Ravi Kumar Austin, TX 371 7400
Dodson, John Steven Pflugerville, TX 214 4138
Kaiser, John Michael Cedar Park, TX 29 526
Lewis, Jerry Don Round Rock, TX 145 2442

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