Staged aluminum deposition process for filling vias

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United States of America Patent

PATENT NO 6660135
APP PUB NO 20020064952A1
SERIAL NO

10038199

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Abstract

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A semiconductor metallization process for providing complete via fill on a substrate, free of voids, and a planar metal surface, free of grooves. In one aspect, a refractory layer is deposited onto a substrate having high aspect ratio contacts or vias formed thereon. A conformal PVD metal layer, such as Al or Cu, is then deposited onto the refractory layer at a pressure below about 1 milliTorr. The vias and/or contacts are then filled with metal, such as by reflowing additional metal deposited by physical vapor deposition on the conformal PVD metal layer. The process is preferably performed in an integrated processing system that includes a long throw PVD chamber, wherein a target and a substrate are separated by at least 100 mm, and a hot metal PVD chamber, also serving as a reflow chamber.

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Patent Owner(s)

Patent OwnerAddress
APPLIED MATERIALS INC3050 BOWERS AVENUE SANTA CLARA CA 95054

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Abburi, Murali Santa Clara, CA 10 141
Cha, Yonghwa Chris San Jose, CA 12 1280
Chen, Fufa Cupertino, CA 30 893
Singhvi, Shri Milpitas, CA 4 90
Yu, Sang-Ho Sunnyvale, CA 33 1968

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