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Abstract

A level shifter circuit for accepting low voltage inputs and providing high voltage outputs corresponding thereto. The level shifter circuit uses a reference voltage source configured to produce an intermediate voltage with respect to ground and a high voltage source. A first output transistor and a second output transistor are used for producing a high voltage swing output signal by using a high voltage source. Source follower transistors are used to switch on and switch off the first and second output transistors by using the intermediate voltage. The source follower transistors are configured to ensure the maximum voltage seen across the gates of the first and second output transistors is limited to a difference between the intermediate voltage and the high voltage source. A differential input buffer can be used for controlling the source follower transistors in accordance with a low voltage differential input. The differential input buffer is configured to control the source follower transistors without requiring a standby current. The components of the level shifter circuit are compatible with widely used CMOS fabrication processes. The level shifter circuit thus comprises a compact, low component count circuit which can shift low voltage digital logic inputs to high voltage outputs.

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