Partial refresh for synchronous dynamic random access memory (SDRAM) circuits

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 6665224
APP PUB NO 20030218930A1
SERIAL NO

10153042

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Abstract

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A semiconductor dynamic random access memory (DRAM) 300 with a programmable memory refresh counter 345 is presented. The counter 345 permits the specification of portions of the DRAM 300 to be refreshed, saving power and time over DRAMs that refresh the entire memory. The counter 345 may be programmed with a wordline address at the beginning of a block of memory and subsequent refresh operations automatically increment or decrement the value in the counter. Additionally, blocks of the memory not being refreshed can be accessed (written or read), improving the utilization of the memory device.

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Patent Owner(s)

Patent OwnerAddress
POLARIS INNOVATIONS LIMITED29 EARLSFORT TERRACE DUBLIN 2 DUBLIN

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Lehmann, Gunther Poughkeepsie, NY 38 461
Menke, Manfred Wolfratshausen, DE 21 315

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