Circuit and method for multiple match detection in content addressable memories
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United States of America Patent
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Dec 23, 2003
Issued Date -
N/A
app pub date -
Dec 10, 2002
filing date -
Jul 12, 1999
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A signal detection circuit that provides multilevel sense detection that is both fast and has low power consumption. The signal detection circuit has amplifying means for providing at least one output corresponding to the difference in voltage levels between a sense node and a reference node. Input means apply a voltage level onto the sense node, and reference means apply a reference voltage onto the reference node. The input and reference means have substantially similar electrical characteristics, however, the reference means includes a reference device that is physically larger than a corresponding device of the input means.
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