Importance

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Abstract

The loop gain of an AGC circuit 7 and the loop gain of a clock regenerating circuit 6 are increased (the gain of an amplifier is increased, or the band of a loop filter is widened) until a synchronizing signal (a segment synchronizing signal or a field synchronizing signal) is detected. The loop gain of the AGC circuit 7 and the loop gain of the clock regenerating circuit 6 are decreased (the gain of the amplifier is decreased, or the band of the loop filter is narrowed) after the synchronizing signal is detected. Consequently, it is possible to make a reduction of a time period required until convergence processing is completed in the AGC circuit and the clock regenerating circuit compatible with an improvement of a ghost disturbance removal performance and accurate clock regeneration.

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First Claim