Piggyback programming with staircase verify for multi-level cell flash memory designs

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Dec 30, 2003
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Feb 8, 2001
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Feb 8, 2001

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Abstract

A method of program verifying a memory cell that includes generating a program verify pulse with stepped portions and programming the memory cell with the program verify pulse.

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MONTEREY RESEARCH LLC	3945 FREEDOM CIRCLE SUITE 900 SANTA CLARA CA 95054

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G11C:STATIC STORES

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Inventor Name	Address	# of filed Patents	Total Citations
Parker, Allan	Austin, TX	41	1249

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Piggyback programming with staircase verify for multi-level cell flash memory designs

Number of patents in Portfolio can not be more than 2000

United States of America Patent

09779884

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PATENT NO	6671207
SERIAL NO	09779884
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09779884

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