Multi chip semiconductor package and method of construction
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United States of America Patent
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Jan 6, 2004
Grant Date -
Dec 12, 2002
app pub date -
Aug 13, 2002
filing date -
Oct 6, 1998
priority date (Note) -
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Abstract
A multi-chip semiconductor package using a lead-on-chip lead frame. The lead-on-chip package places two or more lead-on-chip dice into one package that are either attached to their own lead-on-chip lead frame or are mounted to the same lead-on-chip lead frame and subsequently wire bonded to provide electrical connection from the dice to the lead frame while in substantially the same arrangement without requiring the assembly of the multiple semiconductor dice and lead frame to be flipped for additional wire bonding attachment of the dice to the lead frame.
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