Distributed test architecture for multiport RAMs or other circuitry
Number of patents in Portfolio can not be more than 2000
United States of America Patent
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Jan 6, 2004
Grant Date -
N/A
app pub date -
Jun 13, 2000
filing date -
Jun 13, 2000
priority date (Note) -
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Abstract
An apparatus comprising a first circuit and a second circuit. The first circuit generally comprises a first built in self test (BIST) circuit configured to test the first circuit. The second circuit generally comprises a second BIST circuit configured to test the second circuit. The second circuit may not be adjacent to the first circuit.
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