Fault containment and error recovery in a scalable multiprocessor

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 6678840
SERIAL NO

09651949

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A multi-processor computer system permits various types of partitions to be implemented to contain and isolate hardware failures. The various types of partitions include hard, semi-hard, firm, and soft partitions. Each partition can include one or more processors. Upon detecting a failure associated with a processor, the connection to adjacent processors in the system can be severed, thereby precluding corrupted data from contaminating the rest of the system. If an inter-processor connection is severed, message traffic in the system can become congested as messages become backed up in other processors. Accordingly, each processor includes various timers to monitor for traffic congestion that may be due to a severed connection. Rather than letting the processor continue to wait to be able to transmit its messages, the timers will expire at preprogrammed time periods and the processor will take appropriate action, such as simply dropping queued messages, to keep the system from locking up.

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Patent Owner(s)

  • HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Bannon, Peter J Concord, MA 24 407
Gharachorloo, Kourosh Menlo Park, CA 39 2548
Kessler, Richard E Shrewsbury, MA 127 4343
Verghese, Thukalan V San Carlos, CA 11 193

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