Interrupt control apparatus and method separately holding respective operation information of a processor preceding a normal or a break interrupt
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United States of America Patent
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Jan 20, 2004
Grant Date -
N/A
app pub date -
Oct 4, 2000
filing date -
Oct 29, 1999
priority date (Note) -
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Abstract
When a normal interrupt occurs, data of processor operation before the normal interrupt are held in a normal return address register (452), a normal previous state register (453), and a normal factor register (454). When a break-interrupt occurs, data of processor operation before the break-interrupt is held in another break return address register (455). Hence, a break-interrupt can occur even within an interrupt inhibition period by a normal interrupt. Besides, when a break-interrupt occurs, the break-interrupt state is set in a flag register (456). By referring to the flag register (456) in executing an interrupt return instruction, the operation data before the break-interrupt or before the normal interrupt can accurately be restored.
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