Cyclic redundancy check for partitioned frames

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United States of America Patent

PATENT NO 6681364
SERIAL NO

09405669

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Abstract

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An improved method and system for generating a frame check sequence. A multiple-bit data string, M, is received in which M is of the form: a.sub.n b.sub.n c.sub.n d.sub.n a.sub.n-1 b.sub.n-1 c.sub.n-1 d.sub.n-1 . . . a.sub.2 b.sub.2 c.sub.2 d.sub.2 a.sub.1 b.sub.1 c.sub.1 d.sub.1. M is thereafter parsed into multiple subframes of the form: a.sub.n a.sub.n-1 a.sub.n-2 . . . a.sub.2 a.sub.1 ; b.sub.n b.sub.n-1 b.sub.n-2 . . . b.sub.2 b.sub.1 ; c.sub.n c.sub.n-1 c.sub.n-2 . . . c.sub.2 c.sub.1 ; and d.sub.n d.sub.n-1 d.sub.n-2 . . . d.sub.2 d.sub.1. The subframes are padded with zeros resulting in subframes of the form: a.sub.n 000a.sub.n-1 000a.sub.n-2 000 . . . a.sub.2 000a.sub.1 000; 0b.sub.n 000b.sub.n-1 000b.sub.n-2 00 . . . 0b.sub.2 000b.sub.1 00; 00c.sub.n 000c.sub.n-1 000c.sub.n-2 0 . . . 00c.sub.2 000c.sub.1 00; and 000d.sub.n 000d.sub.n-1 000d.sub.n-2 . . . 000d.sub.2 000d.sub.1. A partial check sum is then generated for each of the multiple subframes. Finally, each of the partial check sums are added together such that a frame check sequence for M is obtained.

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Patent Owner(s)

Patent OwnerAddress
IBM CORPORATION1101 KITCHAWAN ROAD OFFICE 36-238C YORKTOWN HEIGHTS NY 10598

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Calvignac, Jean Louis Cary, NC 108 3042
Jeffries, Clark Debs Durham, NC 89 4534
Verplanken, Fabrice Jean Cary, NC 110 2505

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