Bus mastering debugging system for integrated circuits
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United States of America Patent
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Feb 10, 2004
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N/A
app pub date -
Oct 15, 1999
filing date -
Oct 15, 1999
priority date (Note) -
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Abstract
An integrated circuit includes a debugging unit which uses a multi-master general purpose bus within the IC to perform debugging functions. The storage elements of the IC are mapped into the address space of the general purpose bus. The debugging unit can operate as a bus master and read from or write to the storage elements of the integrated circuit directly with the general purpose bus. Thus, the integrated circuit can be rapidly configured for testing and debugging. Furthermore, the debugging unit can work with a breakpoint unit on the IC to detect and analyze specific situations on the IC.
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