Low power dynamic logic gate with full voltage swing and two phase operation
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United States of America Patent
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Feb 17, 2004
Issued Date -
N/A
app pub date -
May 3, 2002
filing date -
Mar 1, 2002
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A logic circuit for evaluating a logic function while a signal on a clock input is a logic high. The logic circuit pre-discharges an output node to the logic low of the signal on the clock input and then charges the output node to logic high from the clock input when the logic function of the input is such as to require the output node to change state. The pre-discharge path is an n-channel transistor that is conductive only when the signal on the clock input is low. Also disclosed is a logic circuit that evaluates a logic function while a signal on the clock input is a logic high and while the signal on the clock input is a logic low, thereby permitting logic evaluations on both phases of the signal on the clock input.
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