Method of using testbench tests to avoid task collisions in hardware description language
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United States of America Patent
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Mar 2, 2004
Grant Date -
Nov 6, 2003
app pub date -
May 1, 2002
filing date -
May 1, 2002
priority date (Note) -
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Abstract
A method and system for performing simultaneous tests and avoiding task collisions using a hardware description language includes designating a timeslot for one or more of the simultaneous tests, associating the designated timeslot with one or more of the tasks to be performed in a test, determining if the designated timeslot is available before executing the tasks associated with timeslots and executing the tasks when the designated timeslots become available.
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