Method of forming a self-aligned twin well structure with a single mask

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United States of America Patent

PATENT NO 6703187
APP PUB NO 20030129540A1
SERIAL NO

10043861

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Abstract

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An improved method for forming a self-aligned twin well structure for use in a CMOS semiconductor device including providing a substrate for forming a twin well structure therein; forming an implant masking layer over the substrate to include a process surface said masking layer patterned to expose a first portion of the process surface for implanting ions; subjecting the first portion of the process surface to a first ion implantation process to form a first doped region included in the substrate; forming an implant blocking layer including a material that is selectively etchable to the implant masking layer over the first portion of the process surface; removing the implant masking layer to expose a second portion of the process surface; and, subjecting the second portion of the process surface to a second ion implantation process to form a second doped region disposed adjacent to the first doped region.

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Patent Owner(s)

Patent OwnerAddress
TAIWAN SEMICONDUCTOR MANUFACTURING CO LTDHSINCHU

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Sheu, Yi-Ming Hsinchu, TW 53 707
Yang, Fu-Liang Hsin-Chu, TW 182 5286

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