Quad flat non-leaded semiconductor package and method of fabricating the same
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United States of America Patent
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Mar 9, 2004
Grant Date -
Mar 6, 2003
app pub date -
Nov 14, 2001
filing date -
Sep 4, 2001
priority date (Note) -
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status (Latency Note)
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Abstract
A QFN (Quad Flat Non-leaded) semiconductor packaging technology is proposed, which can be used to package a semiconductor chip of a central-pad type having at least one row of bond pads arranged along a center line on one surface of the semiconductor chip. The proposed semiconductor packaging technology is based on a specially-designed leadframe which is formed with a plurality of leads, a chip-support-and-grounding structure, and at least one ground wing; wherein the chip-support-and-grounding structure serves both as a die pad and a ground bus for the packaged chip, and the ground wing is electrically linked to the chip-support-and-grounding structure. After encapsulation process is completed, the ground wing as well as the outer lead portions are exposed to the bottom outside of the encapsulation body, which can be then bonded a PCB's ground plane during SMT (Surface Mount Technology) process, thus enhancing the grounding effect and the electrical performance of the packaged chip during operation.
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