Method and apparatus for executing standard functions in a computer system using a field programmable gate array
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United States of America Patent
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Mar 9, 2004
Grant Date -
N/A
app pub date -
Jul 25, 2000
filing date -
Jul 26, 1999
priority date (Note) -
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Abstract
A computer system comprising mass storage, a system bus connected to the mass storage, and a processor unit connected to the system bus. A library of standard functions is stored in the mass storage. Each library function is stored in at least one of two versions. The first version is obtained from compilation of firmware code, as is conventional. The second version is obtained from compilation of firmware code and comprises a set of configuration data for loading into a field programmable gate array (FPGA). The computer system is provided with a FPGA connected to the system bus which can be configured by the second versions of the library functions so that these can be performed in the FPGA, instead of in the processor. The apparatus and method are well suited to libraries of database search engine functions. Performance advantages can be obtained by executing function calls in the FPGA.
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