Dynamic binary translator with a system and method for updating and maintaining coherency of a translation cache

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United States of America Patent

PATENT NO 6704925
SERIAL NO

09203825

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Abstract

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A dynamic binary translator converts input instruction sequences into output instruction sequences that are stored in a translation cache. In order to maintain coherence of the translation cache with the run-time version of the input instructions, translated code is checked by either a conflict detection mechanism or a code-invariance mechanism. For conflict detection, the system preferably uses memory traces generated by the memory management unit of the underlying hardware processor. In order to check for code-invariance, preludes for comparing cached, output instruction sequences with their supposed run-time input instruction equivalents are appended to the cached instructions themselves. Changes in the input sequences then result only in retranslation of instruction sequences in which at least one instruction has changed; this avoids costly total flushes of the translation cache. An additional prelude is appended to any cached output sequences displaying characteristics of potentially self-constant-modifying code. If the input instructions have since translation changed with respect only to constants, then the constants are updated before execution; this completely eliminates the need for flushing the translation cache or retranslating the instruction if only constants have changed since the original translation. The invention is preferably incorporated in a virtual machine monitor, on which a virtual machine is running.

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Patent Owner(s)

Patent OwnerAddress
VM WARE INC44 ENCINA AVE PALO ALTO CA 94301

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Bugnion, Edouard Menlo Park, CA 20 2707

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