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Abstract

A plurality of sense amplifiers amplify parallel read data from memory cells, respectively. At least one of read amplifiers for amplifying the amplified read data respectively has a higher drivability than those of the rest of the read amplifiers. A connection switching circuit connects the sense amplifiers to a predetermined read amplifier according to an address. Switching the read data to one another before the amplification by the read amplifiers allows read data to be first outputted in burst read operation to be amplified by the read amplifier whose drivability is always high. In the burst read operation, a data output circuit first outputs read data corresponding to the read amplifier whose drivability is high. This enables reductions in read operation time and power consumption, even in a semiconductor memory in which the output orders of read data are changeable according to addresses or operation modes.

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First Claim