Tag design for cache access with redundant-form address
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United States of America Patent
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-
Mar 16, 2004
Grant Date -
Dec 26, 2002
app pub date -
Jun 22, 2001
filing date -
Jun 22, 2001
priority date (Note) -
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Abstract
A memory and method for accessing data in a memory which uses non redundant-form address decoders is disclosed. Lines in subarrays of the memory are selected using the redundant-form addresses. The least significant bit of the non redundant-form address is used to select between these lines. The compare function of the cache memory is then done with a non redundant-form address.
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