IpSec performance enhancement using a hardware-based parallel process
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United States of America Patent
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Mar 16, 2004
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N/A
app pub date -
Jun 5, 2000
filing date -
Jun 5, 2000
priority date (Note) -
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status (Latency Note)
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Abstract
A hardware function performed in the data link control layer first determines if a received frame is an IP frame requiring IPSec processing, and if it is, places the IPSec frame on a separate receive queue for subsequent inbound processing. The hardware function further determines if a frame to be transmitted is an IP frame requiring IPSec outbound processing, and if it is, places the IPSec frame on a separate transmit queue for subsequent outbound processing. To determine if an IP frame is an IPSec frame, the hardware function examines both the type field in the Medium Access Control (MAC) header and the protocol field in the IP header, both at the data link control layer. Once IPSec and non-IPSec traffic are separated at the data link layer into different receive or transmit queues, a hardware assist component processes the IPSec data frames in parallel with the processing of non-IPSec data frames by the processor in the network device. The hardware assist component performs the IPSec functions of encryption and decryption, security association management, and key exchange.
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