Method for compiling high level programming languages into embedded microprocessor with multiple reconfigurable logic
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United States of America Patent
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Mar 16, 2004
Grant Date -
Jan 16, 2003
app pub date -
May 31, 2000
filing date -
Jun 27, 1997
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A computer implemented method for automatically compiling a computer program written in a high level programming language into an intermediate data structure. The data structure is analyzed to identify critical blocks of logic, which can be implemented as an application specific integrated circuit (ASIC), to improve overall performance. The critical blocks of logic are transformed into new equivalent logic with maximal data parallelism. The parallelized logic is then translated into a Boolean gate representation, which is suitable for implementation on an ASIC. The ASIC may be coupled with a generic microprocessor via custom instruction for the microprocessor. The original computer program is then compiled into object code with the new expanded target instruction set.
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