Algorithm of flash memory capable of quickly building table and preventing improper operation and control system thereof
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United States of America Patent
Stats
-
Mar 23, 2004
Grant Date -
May 15, 2003
app pub date -
Nov 15, 2001
filing date -
Nov 15, 2001
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
The present invention relates to an algorithm of flash memory capable of quickly building a mapping table and preventing disorder of data due to abnormal disconnection and a control system thereof, wherein pages of a physical block store data of the mapping table of logical block addresses and corresponding physical block addresses. A set of ECC data are used for protection. When the host computer is normally turned on, data of the mapping table are directly stored into a buffer so that the control device can read. The system can quickly build the mapping table to save the time and operation of turning on without the need of a scanning procedure. If an error of the mapping table due to improper operation occurs, the previous mapping table can be retraced to restore the system to the normal state.
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