Method and arrangement for layout and manufacture of gridless nonManhattan semiconductor integrated circuits
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United States of America Patent
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Mar 23, 2004
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N/A
app pub date -
Jun 3, 2001
filing date -
Dec 7, 2000
priority date (Note) -
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Abstract
The present invention introduces several methods for implementing integrated circuits that use gridless non Manhattan routing to connect the integrated circuit components. In one embodiment, the non Manhattan routed integrated circuits are created by creating an initial route and then compacting the design down. In another embodiment, a gridless non Manhattan integrated circuits are implemented by adapting a gridless Manhattan routing system into a gridless non Manhattan routing system by rotating a plane of a tile based maze router.
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