Method of programming a multi-level memory device
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Mar 30, 2004
Issued Date -
N/A
app pub date -
Jul 2, 2002
filing date -
Jul 2, 2002
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A method of programming a multi-level memory chip in which the first, or lowest, voltage memory state through the next-to-last voltage memory state are programmed by a plurality of programming pulses increasing incrementally in voltage, alternated with a plurality of verify pulses, and in which the last, or highest, voltage memory state of the memory cell is programmed with a programming pulse of the threshold voltage required for charging the memory cell to the highest voltage memory state. The programming method provides accuracy in programming the intermediate memory states of the cell, while providing speed in programming the last memory state of the cell to increase the overall speed of the programming the memory cell.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully