System and method for synchronized control of system simulators with multiple processor cores
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United States of America Patent
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Apr 6, 2004
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N/A
app pub date -
May 16, 2000
filing date -
May 16, 2000
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Abstract
A debugging environment for a multi-processor simulator or emulator is disclosed. The simulator or emulator is ideally suited for the development of embedded software. The simulator can contain multiple processor models, with each processor model representing a processor. The simulator or emulator also includes a scheduler which controls the execution of the processor models. Each processor also communicates with a debugger via a debug adapter. The debug adapter acts as a pass-through filter for non-control commands which are communicated between a processor and its attached debugger. However, the debug adapter routes control commands to the scheduler. The scheduler ensures that all of the processors and debuggers maintain synchronization. Other modules can also be included in the multi-processor simulation environment, for example, clock gate modules.
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