PC board having clustered blind vias
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United States of America Patent
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Apr 13, 2004
Grant Date -
N/A
app pub date -
Apr 14, 1998
filing date -
Apr 14, 1998
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A multilayer printed circuit board having clustered blind vias in power layers to facilitate the routing of signal traces in signal layers. A portion of the blind vias in the power layers are grouped together to form a cluster of blind vias. Corresponding signal routing channels are provided in the signal layers and aligned with the cluster of blind vias in the power layers to permit routing of signal traces or signal circuitry therethrough. A method of manufacturing the multilayered printed circuit board includes assembling a first subassembly of power layers, forming a group of clustered power vias through the first subassembly, assembling a second subassembly of signal layers, combining the first subassembly with the second subassembly such that the clustered vias in the first subassembly align with signal routing channels in the second subassembly, forming signal vias that extend through the first and second subassemblies, and seeding or plating the power and signal vias.
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