Switch-based scalable performance computer memory architecture

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United States of America Patent

PATENT NO 6721317
SERIAL NO

10039141

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Abstract

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Several embodiments of a computer system are described which achieve separation of control and data paths during data transfer operations, thus allowing independent scalability of storage system performance factors (e.g., storage system iops and data transfer rate). In one embodiment, the computer system includes a data switch coupled between a host computer and one or more storage devices. A storage controller for managing the storage of data within the one or more storage devices is coupled to the switch. The switch includes a memory for storing data routing information generated by the controller, and uses the data routing information to route data directly between the host computer and the one or more storage devices such that the data does not pass through the storage controller. Within the computer system, information may be conveyed between the host computer, the switch, the one or more storage devices, and the storage controller according to a two party protocol such as the Fibre Channel protocol. The computer system achieves separation of control and data paths using a modified switch and standard host adapter hardware and host driver software. In addition, a two party protocol such as the Fibre Channel protocol is not violated.

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Patent Owner(s)

Patent OwnerAddress
SUN MICROSYSTEMS INC4150 NETWORK CIRCLE SANTA CLARA CA 95054

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chong, Jr Fay Cupertino, CA 32 739

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