Shared execution unit in a dual core processor
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United States of America Patent
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Apr 20, 2004
Grant Date -
N/A
app pub date -
Jun 15, 2000
filing date -
Jun 15, 2000
priority date (Note) -
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Abstract
A microprocessor includes a first processor core and a second processor core. The first core includes a first processing block. The first processing block includes an execution unit suitable for executing a first type of instruction. The second core includes a second processing block. The second processing block includes an execution unit suitable for executing an instruction if the instruction is of the first type. The processor further includes a shared execution unit. The first and second processor cores are adapted to forward an instruction to the shared execution unit for execution if the instruction is of a second type. In one embodiment, the first type of instruction includes fixed point instructions, load/store instructions, and branch instructions and the second type of instruction includes floating point instructions.
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