Method and apparatus for emulating a floating point stack in a translation process
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United States of America Patent
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Apr 20, 2004
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N/A
app pub date -
Jun 16, 2000
filing date -
Jun 16, 2000
priority date (Note) -
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Abstract
A floating point processor including a plurality of explicitly-addressable processor registers, an emulation register capable of storing a value used to logically rename the explicitly-addressable registers to emulate registers of a floating point stack, a computer-executable software process for calculating and changing a value in the emulation register to a value indicating a change in addresses of registers of a floating point stack when executing a floating point stack operation, and adder circuitry combining a register address and the value in the emulation register in response to the computer-executable process to rename the plurality of explicitly-addressable processor registers.
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