Importance

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Abstract

A method and apparatus for generating a configuration bitstream for a programmable logic device using logic ports associated with logic cores. Logic ports are associated with respective ones of a plurality of logic cores, and logical connections are made between selected ones of the ports of the logic cores. Source pins, wherein a pin represents an output resource of a programmable element of the programmable logic device, are associated with selected ones of the ports. A sink pin represents an input resource of a programmable element of the programmable logic device, and sink pins are associated with selected ones of the ports. In response to a route programming interface call that references a source port and a sink port, bits for the configuration bitstream are generated for routing resources to connect selected ones of the source pins to selected ones of the sink pins. Usage of logic ports assists in runtime reconfiguration of logic.

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First Claim