Importance

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Abstract

An enhanced prefetching technique enables control of internal activities of a cache memory by a processor without relying on conventional algorithms. The cache memory is contained within a processor complex of a programmable arrayed processing engine used to efficiently process data within an intermediate network station of a computer network. The cache may further assume various functions while providing an interface to an external memory of the station via a memory controller. That is, the cache may function as a read buffer, a write buffer and/or a buffer for pending atomic commands, each of which is merged into a single memory bank that can be partitioned in any manner to enable efficient utilization.

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First Claim