Microcomputer with test instruction memory
Number of patents in Portfolio can not be more than 2000
United States of America Patent
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Apr 27, 2004
Grant Date -
N/A
app pub date -
Sep 7, 2000
filing date -
Sep 10, 1999
priority date (Note) -
Expired
status (Latency Note)
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Abstract
The microcomputer has an instruction memory interface that applies instructions to an instruction execution unit. In a normal state instructions are obtained from instruction memory under control of a normal program counter. In a test state a same source of an instruction is used cyclically to apply a same instruction information from a test instruction memory. Normal addressing is suppressed in the test state, so that the same instruction is executed repeatedly independent of normal program flow.
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