Importance

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Abstract

The input buffer switch scheduling method in this invention is tailored to operate responsively with respect to a global common time reference, such that the switching delay from input to output is deterministic. Consequently, such a switch can be employed in the construction of very high speed virtual leased lines (VLLs). Such VLLs can carry real-time traffic over packet switching networks while guaranteeing end-to-end performance. The switching and data packet forwarding method combines the advantages of both circuit and packet switching. According to the invention, timing information is not used for routing, and therefore, in the Internet, for example, the routing is done using IP addresses or an MPLS tag/label. Also, according to this invention, the switch memory access bandwidth is independent of the number of switching input/output ports. This provides the desired scalability property to the switch design, which is a direct outcome of using input port buffering together with a novel switch scheduling method.

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First Claim