SiC wafer, SiC semiconductor device, and production method of SiC wafer

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United States of America Patent

PATENT NO 6734461
SERIAL NO

10070472

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Abstract

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A SiC wafer comprises a 4H polytype SiC substrate 2 in which the crystal plane orientation is substantially {03-38}, and a buffer layer 4 composed of SiC formed over this SiC substrate 2. The {03-38} plane forms an angle of approximately 35.degree. with respect to the <0001> axial direction in which micropipes and so forth extend, so micropipes and so forth are eliminated at the crystal sides, and do not go through to an active layer 6 on the buffer layer 4. Lattice mismatching between the SiC substrate 2 and the active layer 6 is suppressed by the buffer layer 4. Furthermore, anisotropy in the electron mobility is low because a 4H polytype is used. Therefore, it is possible to obtain a SiC wafer and a SiC semiconductor device with which there is little anisotropy in the electron mobility, and strain caused by lattice mismatching can be lessened, as well as a method for manufacturing these.

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Patent Owner(s)

  • SUMITOMO ELECTRIC INDUSTRIES, LTD.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Kimoto, Tsunenobu Kyoto, JP 30 615
Matsunami, Hiroyuki Yawata, JP 38 601
Shiomi, Hiromu Suita, JP 67 1078

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