Method, apparatus, and system to reduce microprocessor power dissipation
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United States of America Patent
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May 18, 2004
Grant Date -
Jul 4, 2002
app pub date -
Dec 30, 2000
filing date -
Dec 30, 2000
priority date (Note) -
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Abstract
A method and apparatus for reducing a microprocessor's power dissipation. In one embodiment a microprocessor includes a clock circuit, a core coupled to said clock circuit, and an on-die logic circuit coupled to said clock circuit to operate independent of a connection for power to said core, the on-die logic circuit includes a snoop request monitor coupled to a bus, and a snooping memory circuit.
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