Planarization process for semiconductor substrates

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United States of America Patent

PATENT NO 6743724
APP PUB NO 20010051430A1
SERIAL NO

09832560

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Abstract

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A method of manufacturing semiconductor devices using an improved chemical mechanical planarization process for the planarization of the surfaces of the wafer on which the semiconductor devices are formed. The improved chemical mechanical planarization process includes the formation of a flat planar surface from a deformable coating on the surface of the wafer filling in between the surface irregularities prior to the planarization of the surface through a chemical mechanical planarization process.

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Patent Owner(s)

Patent OwnerAddress
MICRON TECHNOLOGY INC8000 SO FEDERAL WAY BOISE ID 83716-9632

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Blalock, Guy T Boise, ID 151 4037
Doan, Trung T Boise, ID 253 14083
Durcan, Mark Boise, ID 21 565
Meikle, Scott G Boise, ID 104 2653

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