BIT LINE CONTROL DECODER CIRCUIT, VIRTUAL GROUND TYPE NONVOLATILE SEMICONDUCTOR STORAGE DEVICE PROVIDED WITH THE DECODER CIRCUIT, AND DATA READ METHOD OF VIRTUAL GROUND TYPE NONVOLATILE SEMICONDUCTOR STORAGE DEVICE

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United States of America Patent

PATENT NO 6744667
APP PUB NO 20030058712A1
SERIAL NO

10256255

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Abstract

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There is provided a virtual ground type nonvolatile semiconductor storage device capable of effectively suppressing a leak current to the adjacent cell and thereby achieving high-speed read. During read operation, a ground potential GND is applied to a bit line SBL5 connected to the source region of one memory cell transistor MC04 subjected to read. Moreover, a read drain bias potential Vread is applied to a bit line SBL4 connected to the drain region of the memory cell transistor MC04. A bit line SBL3 connected to the drain region of a first adjacent memory cell transistor MC03 is put into a floating state. A potential Vdb equal to the read drain bias potential Vread is applied to a bit line SBL2 connected to the drain region of a second adjacent memory cell transistor MC02.

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Patent Owner(s)

Patent OwnerAddress
III HOLDINGS 10 LLC2711 CENTERVILLE RD SUITE 400 WILMINGTON DE 19808

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ito, Nobuhiko Tenri, JP 31 318
Yamamoto, Kaoru Yamatokoriyama, JP 239 5624

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