Method of manufacturing semiconductor integrated circuit device comprising a memory cell and a capacitor
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Jun 8, 2004
Grant Date -
Mar 20, 2003
app pub date -
Feb 27, 2002
filing date -
Sep 19, 2001
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A silicon oxide film on which a capacitor of a semiconductor integrated circuit device is formed is formed by the plasma CVD method at a temperature of 450.degree. C. to 700.degree. C. In this semiconductor integrated circuit device, a memory cell formed of a MISFET for data transfer and a capacitor is formed in a memory cell forming area, and an n channel MISFET and a p channel MISFET constituting a logic circuit is formed in a logic circuit forming area. As a result, the amount of degassing from the silicon oxide film can be reduced. Therefore, the growth of silicon grains on a surface of the silicon film constituting a lower electrode of the capacitor is not hindered by the degassing, and it becomes possible to increase the capacitance. Also, the step of a heat treatment for removing the moisture and the like after forming the silicon oxide film can be omitted, and it becomes possible to prevent the deterioration of the property of the MISFET.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully