Importance

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Abstract

A non volatile memory apparatus including a control circuit, plural terminals having clock, command and other terminals, plural nonvolatile memory cells, and first and second volatile memories. The clock and command terminals respectively receive a first clock signal and commands including read and program commands. In response to the read command, the control circuit controls reading data from the memory cells, stores read data to the second volatile memory, transfers data to first volatile memory, and outputs data via the other terminal except the command terminal in response to the first clock signal. In response to the program command, the control circuit controls receiving data via the other terminal except the command terminal in response to the first clock signal, stores received data to the first volatile memory, transfers data to the second volatile memory, and writes data to the memory cells.

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First Claim