Method and system for an interrupt accelerator that reduces the number of interrupts for a digital signal processor
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Jun 8, 2004
Grant Date -
Aug 29, 2002
app pub date -
Feb 28, 2001
filing date -
Feb 28, 2001
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A circuit arrangement reduces the number of interrupts to a DSP required to transfer digital samples between external I/O devices and a data memory, thus allowing the DSP to perform additional sample processing operations. An interrupt accelerator responds to I/O interrupts from an I/O device by pausing the DSP, transferring samples with the data memory, and tracking the number of samples transferred. When a predetermined number of samples have been transferred, the interrupt accelerator interrupts the DSP to perform a block transfer of samples in conjunction with sample processing.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully