Method and apparatus for electrically testing and characterizing formation of microelectric features
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United States of America Patent
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Jun 15, 2004
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N/A
app pub date -
Oct 1, 1999
filing date -
Oct 1, 1999
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Abstract
A semiconductor wafer is etched to create an array of MEMS devices and at the same time, test sites having geometry which represent critical geometry of the MEMS devices. Probe contacts are provided in the test sites to permit measurement of resistance and capacitance between test site geometry as a way of determining the effectiveness of the etch. One test site comprises a ladder of semiconductor structures separated by gaps of graded width. Another test site comprises finger structures formed over a cavity and the probe contacts are located so as to detect inter-finger capacitance and resistance (or continuity) as well as intra-finger resistance.
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